Interrupt List - Release 61 (16jul00)
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TIME STAMP COUNTER
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RBIL61 - TIME STAMP COUNTER
86 Bugs List
{#idx176081}
{#idx176428}
{#idx176520}
{#idx176559}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0010h - Pentium, Pentium Pro - TIME STAMP COUNTER REGISTER
{#idx165086}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
8000h:0010h - Pentium - TIME STAMP COUNTER
{#idx166328}
Opcodes List
{#idx172825}
{#idx172834}
{#idx172844}
{#idx172854}
{#idx172862}
{#idx172871}
{#idx172883}
{#idx174107}