INT 15 - Intel System Management Bus - REQUEST CONTINUATION                     
	AX = 53B0h
	BH = 11h
	BL = protocol (see #00487)
	CH = device address
	CL = number of valid bytes in DX (1 or 2)
	DH = MSB Data (CL = 1 or 2)
	DL = LSB Data (CL = 2)
Return: CF clear if successful
	    AH = 00h (SMBus(System Management Bus) A derivative of the I2C bus used for communication between various components of a computer, such as smart batteries and their chargers.  In contrast to I2C, SMBus specifies fixed voltage levels (instead of relative to the power supply voltage) and a 10 KHz minimum clock rate (I2C minimum is 0).  SMBus also specifies several timings which are not required by I2C.  See also I2C, ACCESS.bus. OK)
	    CL = SMBus(System Management Bus) A derivative of the I2C bus used for communication between various components of a computer, such as smart batteries and their chargers.  In contrast to I2C, SMBus specifies fixed voltage levels (instead of relative to the power supply voltage) and a 10 KHz minimum clock rate (I2C minimum is 0).  SMBus also specifies several timings which are not required by I2C.  See also I2C, ACCESS.bus. status
		00h SMBus(System Management Bus) A derivative of the I2C bus used for communication between various components of a computer, such as smart batteries and their chargers.  In contrast to I2C, SMBus specifies fixed voltage levels (instead of relative to the power supply voltage) and a 10 KHz minimum clock rate (I2C minimum is 0).  SMBus also specifies several timings which are not required by I2C.  See also I2C, ACCESS.bus. hardware not ready for more data
		01h SMBus(System Management Bus) A derivative of the I2C bus used for communication between various components of a computer, such as smart batteries and their chargers.  In contrast to I2C, SMBus specifies fixed voltage levels (instead of relative to the power supply voltage) and a 10 KHz minimum clock rate (I2C minimum is 0).  SMBus also specifies several timings which are not required by I2C.  See also I2C, ACCESS.bus. hardware ready for 2 more data bytes
	CF set if error
	    AH = error code (05h,11h,13h,15h,16h,18h,1Bh,86h) (see #00484)
Desc:	continue WriteBlock protocol started with function 10h
SeeAlso: AX=53B0h/BH=10h, AX=53B0h/BH=13h