INT 02 C - external hardware - NON-MASKABLE INTERRUPT                           
Desc:	generated by the CPU(Central Processing Unit) The microprocessor which executes programs on your computer. when the input to the NMIsee Non-Maskable Interrupt pin is asserted
Notes:	return address points to start of interrupted instruction on 80286+
	on the 80286+, further NMIs are disabled until the next IRET
	  instruction, but one additional NMIsee Non-Maskable Interrupt is remembered by the hardware
	  and will be serviced after the IRET instruction reenables NMIs
	maskable interrupts may interrupt the NMIsee Non-Maskable Interrupt handler if interrupts are
	although the Intel documentation states that this interrupt is
	  typically used for power-failure procedures, it has many other uses
	  on IBM-compatible machines:
		Memory parity error: all except JrIBM PCjr, CONVIBM Convertible, and some machines
				  without memory parity
		Breakout switch on hardware debuggers
		Coprocessor interrupt: all except JrIBM PCjr and CONVIBM Convertible
		Keyboard interrupt: JrIBM PCjr, CONVIBM Convertible
		I/O channel check: CONVIBM Convertible, PS50+IBM PS/2 Models 50,60,70,80
		Disk-controller power-on request: CONVIBM Convertible
		System suspend: CONVIBM Convertible
		Real-time clock: CONVIBM Convertible
		System watch-dog timer, time-out interrupt: PS50+IBM PS/2 Models 50,60,70,80
		DMAsee Direct Memory Access timer time-out interrupt: PS50+IBM PS/2 Models 50,60,70,80
		Low battery: HP 95LX
		Module pulled: HP 95LX