MEM FEE003E0h - Pentium + - LOCAL APIC - TIMER DIVIDE CONFIGURATION REGISTER    
Size:	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.
SeeAlso: MEM FEE00000h,MEM FEE00320h


Bitfields for Pentium (and later) APIC timer divide configuration:
Bit(s)	Description	(Table M0125)
 31-4	reserved
 3,1,0	divisor
	000 divide by 2
	001 by 4
	010 by 8
	...
	110 by 128
	111 by 1
 2	zero (0)
Note:	the divisor determines the timer's time base relative to the processor
	  clock
SeeAlso: #M0123