MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00000001h - Pentium, Pentium Pro - MACHINE CHECK EXCEPTION TYPE Size: 6 bits Access: Read Desc: when a Machine Check exception occurs, this register contains the reason for the exception Notes: also supported by AMD Am5k86, K5, and K6; however, the K6 does not actually support the machine check -- this register may be written on the K6 to emulate that functionality this register does not exist on the Pentium Pro/Pentium II, but will not cause an exception when accessed SeeAlso: MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00000000h,MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 80000001h,INT 12"MACHINE CHECK" Bitfields for Machine Check ExceptionA signal by the CPU that some error condition has been encountered that it can not deal with without a program's intervention. The most commonly encountered exceptions on Intel processors are Exceptions 12 and 13 (decimal, how Intel specifies exception numbers), which are stack and general problems, respectively. Exception 13 is typically caused by a memory access which wraps from the end of a segment back to the beginning. type (MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00000001h): Bit(s) Description (Table R0001) 63-6 reserved (0) 5 "FERI" Fan Error Indicator (Pentium OverDrive only) -- CPU(Central Processing Unit) The microprocessor which executes programs on your computer. overheated (once set, this bit remains set even through CPU(Central Processing Unit) The microprocessor which executes programs on your computer. reset) 4 bus cycle causing exception was locked 3 state of M/IO# pin during bus cycle 2 state of D/C# pin during bus cycle 1 state of W/R# pin during bus cycle 0 Machine Check pending (cleared by reading this MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.)