Interrupt List - Release 61 (16jul00)
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CONFIGURATION ACCESS
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RBIL61 - CONFIGURATION ACCESS
INT 2F - Intel Plug-and-Play - CONFIGURATION ACCESS - GET ENTRY POINT
{#idx81334}
{#idx81339}
{#idx81340}
{#idx81343}
{#idx81349}
INT 2F - MS Windows - GET DEVICE
API
(Application Program[ming] Interface) The defined set of calls which a program may make to interact with or request services of the operating system or environment under which it is running. Because the inputs and outputs of the calls are well-defined, a program using the API can continue using the identical calls even if the internal organization of the program providing the API changes.
ENTRY POINT
{#idx80187}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:011Ah - PentiumII -
"BBL_CR_TRIG"
TRIGGER CACHE CONFIGURATION CYCLE
{#idx165879}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:011Bh - PentiumII -
"BBL_CR_BUSY"
CHECK IF CACHE CONFIG IN PROGRESS
{#idx165888}
PORT
IBM PC Portable (uses same BIOS as XT)
0CFB - Intel 82434NX
(Neptune)
- PCI MECHANISM CONTROL REGISTER
{#idx153597}
{#idx153600}