INT 15 R - Intel Pentium Pro BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE - WRITE BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE AREA
	AX = D042h
	BL = 01h
	ES:DI -> microcode update block (see #00533)
	CX,DX,SI = segments of three 64K scratchpad areas for BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. use
Return: CF clear if successful
	CF set on error
	AH = status (see #00532)
	AL = OEM(Original Equipment Manufacturer) a company which purchases components that are resold as part of its own products under the company's own brand name, e.g. a Gateway 2000-branded monitor may actually be a Mag or NEC monitor. error (if AH is not 00h or 86h, otherwise undefined)
	    00h successful
Notes:	a microcode update may also be initiated by a WRMSR instruction
	  with ECX=0079h, EDX=00000000h, and EAX=linear address of update
	  block (see #00533)
	at least 32K stack space must be available when this function is called
SeeAlso: AX=D042h/BL=00h,AX=D042h/BL=02h,AX=D042h/BL=03h,MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like.	These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00000079h


(Table 00532)
Values for Pentium Pro BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. update status:
 00h	successful
 86h	not implemented
 90h	unable to erase NVRAMsee Non-Volatile RAM device
 91h	unable to write to NVRAMsee Non-Volatile RAM device
 92h	unable to read storage
 93h	NVRAMsee Non-Volatile RAM is full
 94h	specified processor stepping is not present in system
 95h	invalid header or loader version
 96h	wrong checksum in header
 97h	processor rejected the update
 98h	the same or a more recent update is already stored
 99h	update block number was out of range


Format of Pentium Pro microcode update block:
Offset	Size	Description	(Table 00533)
 00h	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.	update header version number (currently 00000001h)
		FFFFFFFFh = unused block
 04h	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.	revision number of this microcode update
 08h	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.	update creation date, as BCD(Binary Coded Decimal) A method of data storage where two decimal digits are stored in each byte, one in the upper four bits and the other in the lower four bits.  Since only the values 0 through 9 are used in each half of a byte, BCD values can be read as decimal numbers on a hexadecimal display of memory or a file. mmddyyyy (month,day,year)
 0Ch	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.	family/model/stepping of processor to which update applied
		(same value as returned by CPUID instruction)
 10h	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.	checksum (used to force sum of all 512 DWORDs of the update
		block to 00000000h)
 14h	DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address.	revision number of loader needed to install update
		(currently 00000001h)
 18h 24 BYTEs	reserved for future expansion
 30h 2000 BYTEs	encrypted microcode data
SeeAlso: MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like.	These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00000079h,OPCODE "CPUID"