Interrupt List - Release 61 (16jul00)
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∕ HTML Edition ∕ Model-specific Registers ∕ Reserved (and Not Otherwise Classified) ∕ MSR 0000h:1003h - Pentium Pro - DEBUG REGISTER 3
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MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like.	These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00001003h - Pentium Pro - DEBUG REGISTER 3
SeeAlso: MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like.	These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00001002h"Pro",MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like.	These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 00001004h"Pro"
                                                                                
Interrupt List - Release 61 (16jul00) Copyright © 1989-1999,2000 Ralf Brown, HTML conversion by RBILtoHTML - 0.9.3.3245 (r314) Copyright © 2020-2022 Jerome Shidel