PORTIBM PC Portable (uses same BIOS as XT) 0080 - MANUFACTURING DIAGNOSTICS PORTIBM PC Portable (uses same BIOS as XT)
Note:	sometimes used for a POSTsee Power-On Self-Test hex display

0080  -W  Manufacturing Diagnostics port
0080  R-  ???


(Table P0410)
Values for AMIAmerican Megatrends, Inc.(American Megatrends, Inc.) A hardware, software and firmware company founded in 1985. BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. diagnostics codes:
 00h	system boot completed, control passed to INT 19 bootstrap loader
 01h	register test
 02h	video initialization; NMIs disabled
 03h	power-on delay complete
 04h	pre-keyboard-test initializations complete
 05h	soft-reset/power-on setting determined
 06h	ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. enabled
 07h	ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. checksum test passed
 08h	keyboard BAT command issued
 09h	keyboard controller BAT result verified
 0Ah	keyboard controller command code issued
 0Bh	keyboard controller command byte written
 0Ch	keyboard controller pins 23/24 blocked and unblocked
 0Dh	keyboard controller NOP processing in progress
 0Eh	CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. shutdown register read/write test passed
 0Fh	CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. checksum calculation complete
 10h	CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. initialization complete
 11h	CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. status register initialized
 12h	DMAsee Direct Memory Access controllers 1/2 and interrupt controllers 1/2 disabled
 13h	video display disabled, port B initialized
 14h	chipset initialization, auto memory detection
 15h	8254 channel 2 test half complete
 16h	8254 channel 2 test completed
 17h	8254 channel 1 test completed
 18h	8254 channel 0 test completed
 19h	memory refresh started
 1Ah	memory refresh line is toggling
 1Bh	memory refresh test completed
 20h	base 64K memory test started
 21h	address line test passed
 22h	parity toggle complete
 23h	base 64K sequential read/write test passed
 24h	pre-interrupt-vector-initialization configuration complete
 25h	interrupt vectors initialized
 26h	8042 input port read
 27h	global data initialization complete
 28h	post-interrupt-vector-initialization initialization complete
 29h	monochrome mode set
 2Ah	color mode set
 2Bh	parity toggle on option video ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. test complete
 2Ch	initialization before video ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. control complete
 2Dh	video ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. check complete
 2Eh	!!!
 A9h	returned from E0000h adapter ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs.
 AAh	final initializations after adapter ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. initializations complete
SeeAlso: #P0411,#P0412,#P0413


(Table P0411)
Values for AWARD (non-PnP) diagnostic code:
 01h	Processor Test 1
 02h	Processor Test 2
 03h	initialize chips
 04h	test memory refresh toggle
 05h	blank video, initialize keyboard
 06h	reserved
 07h	test CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. and CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. batter status
 08h	setup low memory
 09h	early cache initialization
 0Ah	interrupt vector initialization
 0Bh	test CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. checksum
 0Ch	initialize keyboard
 0Dh	initialize video interface
 0Eh	test video memory
 0Fh	test DMAsee Direct Memory Access channel 0
 10h	test DMAsee Direct Memory Access channel 1
 11h	test DMAsee Direct Memory Access page registers
 12h	reserved
 13h	reserved
 14h	test timer channel 2
 15h	test master PIC mask bits
 16h	test slave PIC mask bits
 17h	test 8259 stuck interrupt bits
 18h	test 8259 interrupt functionality
 19h	test for stuck NMIsee Non-Maskable Interrupt
 1Ah	display CPU(Central Processing Unit) The microprocessor which executes programs on your computer. clock
 1Bh-1Eh reserved
 1Fh	set EISA(Enhanced Industry-Standard Architecture) A 32-bit superset of the IBMInternational Busiuness Machines ATIBM PC AT's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus). mode
 20h	enable Slot 0 (system board)
 21h-2Fh enable Slots 1-15
 30h	get base and extended memory size
 31h	test base and extended memory
 32h	test EISA(Enhanced Industry-Standard Architecture) A 32-bit superset of the IBMInternational Busiuness Machines ATIBM PC AT's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus). memory
 33h-3Bh reserved
 3Ch	set allow-setup flag
 3Dh	initialize / install mouse
 3Eh	initialize cache controller
 3Fh	reserved
 41h	initialize floppy controller and drives
 42h	initialize hard disk controller and drives
 43h	detect / initialize serial and parallel ports
 44h	reserved
 45h	initialize math coprocessor
 46h-4Dh reserved
 4Eh	Manufacturing Post loop / or / display any error messages
 4Fh	ask for password, if enabled
 50h	update CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock.
 51h	pre-boot enable of parity, NMIsee Non-Maskable Interrupt, cache
 52h	initialize option ROMs
 53h	initialize BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. time from RTCsee Real-Time Clock
 60h	setup boot-sector protection
 61h	set boot CPU(Central Processing Unit) The microprocessor which executes programs on your computer. speed
 62h	setup NumLock
 63h	attempt to boot via INT 19h
 B0h	spurious interrupt while in protected mode
 B1h	unclaimed NMIsee Non-Maskable Interrupt
 BEh	chipset default initialization
 BFh	chipset initialization
 C0h	turn off chipset cache
 C1h	check on-board memory size
 C5h	early shadow-RAM enable for faster boot
 C6h	detect external cache size
 E1h-EFh setup utility pages 1-15
 FFh	system booting operating system
SeeAlso: #P0410,#P0412,#P0413


(Table P0412)
Values for AWARD (Plug-and-Play) POSTsee Power-On Self-Test code:
 01h-02h reserved
 03h	initialize EISA(Enhanced Industry-Standard Architecture) A 32-bit superset of the IBMInternational Busiuness Machines ATIBM PC AT's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus). register (if applicable)
 04h	reserved
 05h	keyboard controller test, initialize keyboard
 06h	reserved
 07h	test CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. and CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. batter status
 09h	program Cyrix CPU(Central Processing Unit) The microprocessor which executes programs on your computer. configuration; OEM-specific cache initialization
 0Ah	initialize interrupt vectors; early power management initialization
 0Bh	check CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock.; assign I/O and memory to PCI devices
 0Ch	initialize BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. data area
 0Dh	early chipset setup; measure CPU(Central Processing Unit) The microprocessor which executes programs on your computer. speed; video initialization
 0Eh	display Award logo, OEM-specific sign-on messages
 0Fh	test DMAsee Direct Memory Access channel 0
 10h	test DMAsee Direct Memory Access channel 1
 11h	test DMAsee Direct Memory Access page registers
 12h-13h reserved
 14h	test timer channel 2
 15h	test master PIC mask bits
 16h	test slave PIC mask bits
 17h	reserved
 19h	test 8259 functionality
 1Ah-1Dh reserved
 1Eh	EISA(Enhanced Industry-Standard Architecture) A 32-bit superset of the IBMInternational Busiuness Machines ATIBM PC AT's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus). initialization (if applicable and EISA(Enhanced Industry-Standard Architecture) A 32-bit superset of the IBMInternational Busiuness Machines ATIBM PC AT's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus). NVRAMsee Non-Volatile RAM checksum is good)
 1Fh-29h reserved
 30h	get base and extended memory size
 31h	test base and extended memory
 32h	program on-board serial/parallel ports, floppy controller
 33h-3Bh reserved
 3Ch	set allow-setup flag
 3Dh	initialize keyboard, install PS/2IBM PS/2, any model mouse if attached
 3Eh	try to turn on L2 cache
 3Fh-40h reserved
 41h	initialize floppy controller, drives
 42h	initialize hard disk controller, drives
 43h	initialize serial/parallel ports (if PnP)
 44h	reserved
 45h	initialize math coprocessor
 46h-4Dh reserved
 4Eh	display any error messages
 4Fh	ask for password, if required
 50h	update CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock.
 51h	reserved
 52h	initialize expansion ROMs, PCI, PnP, shadow RAM(Random Access Memory)	See also DRAM, SRAM., power management
 53h	if not PnP, initialize serial/parallel ports; set BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. time
 54h-5Fh reserved
 60h	set boot-sector protection
 61h	turn on L2 cache; set boot speed; final chipset/PM initialization
 62h	setup daylight savings time; set NumLock, typematic
 63h	update ESCD (PnP only) if changes; boot system via INT 19h
 B0h	spurious interrupt while in protected mode
 B1h	unclaimed NMIsee Non-Maskable Interrupt
 BEh	chipset default initialization
 BFh	chipset initialization
 C0h	turn off chipset cache, init DMAsee Direct Memory Access/PIC/timer/RTCsee Real-Time Clock with default values
 C1h	check on-board DRAM(Dynamic Random Access Memory) RAM memory which essentially consists of a tiny capacitor for each bit of memory.  Since capacitors do not hold a charge indefinitely, DRAM must be constantly refreshed to avoid losing its contents.  Also, the process of reading the contents of the memory are destructive, meaning extra time must be spent restoring the contents of memory addresses which are accessed, so DRAM is slower than SRAM.  See also Refresh, SRAM. and cache size
 C3h	test first 256K DRAM(Dynamic Random Access Memory) RAM memory which essentially consists of a tiny capacitor for each bit of memory.  Since capacitors do not hold a charge indefinitely, DRAM must be constantly refreshed to avoid losing its contents.  Also, the process of reading the contents of the memory are destructive, meaning extra time must be spent restoring the contents of memory addresses which are accessed, so DRAM is slower than SRAM.  See also Refresh, SRAM., expand compressed BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. image into DRAM(Dynamic Random Access Memory) RAM memory which essentially consists of a tiny capacitor for each bit of memory.  Since capacitors do not hold a charge indefinitely, DRAM must be constantly refreshed to avoid losing its contents.  Also, the process of reading the contents of the memory are destructive, meaning extra time must be spent restoring the contents of memory addresses which are accessed, so DRAM is slower than SRAM.  See also Refresh, SRAM.
 C5h	early shadow-RAM enable for faster boot
 FFh	system is booting operating system
SeeAlso: #P0410,#P0411,#P0413


(Table P0413)
Values for Chips&Technologies 82C100/82C235 POSTsee Power-On Self-Test code:
 01h	flags register failed
 02h	a CPU(Central Processing Unit) The microprocessor which executes programs on your computer. register failed
 03h	incorrect ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. checksum
 04h	DMAsee Direct Memory Access controller failed
 05h	system timer failed
 06h	first 64K of RAM(Random Access Memory)	See also DRAM, SRAM. failed address test
 07h	first 64K of RAM(Random Access Memory)	See also DRAM, SRAM. failed RAM(Random Access Memory)	See also DRAM, SRAM. test
 08h	interrupt controller failed
 09h	"Hot Interrupt" occurred
 0Ah	reserved
 0Bh	CPU(Central Processing Unit) The microprocessor which executes programs on your computer. still in protected mode
 0Ch	DMAsee Direct Memory Access page register failed
 0Dh	no RAM(Random Access Memory)	See also DRAM, SRAM. refresh
 0Eh	no response from keyboard controller
 0Fh	unable to enter protected mode
 10h	GDT or IDTsee Interrupt Descriptor Table register failed
 11h	LDT register failed
 12h	task register failed
 13h	LSL instruction failed
 14h	LAR instruction failed
 15h	VERR or VERW instruction failed
 16h	keyboard controller A20(Address line 20) The 80286 and higher CPUs allow addresses in real mode to extend slightly beyond the one megabyte mark, which causes an incompatibility with some older programs which expect such addresses to wrap back to the beginning of the address space.  For complete compatibility with the 8088, newer machines thus contain circuitry which permits the twenty-first address line (A20) to be disabled.  The CPU then effectively has only twenty address lines in real mode, just as the 8088 does, and addresses which would extend beyond the one megabyte mark wrap to the beginning of the address space.  See also High Memory Area, Real Mode. gate failed
 17h	exception failed, or shutduwon on unexpected exception
 18h	shutdown during memory test
 19h	checksum error in copyright string
 1Ah	BMS checksum error
---POST progress codes---
 50h	initialize hardware
 51h	initialize timer
 52h	initialize DMAsee Direct Memory Access controller
 53h	initialize 8259
 54h	initialize chipset
 55h	reserved
 56h	first entry into protected mode
 57h	memory-chip sizing
 58h	reserved
 59h	first exit from protected mode
 5Ah	system-board memory size determination
 5Bh	shadow RAM(Random Access Memory)	See also DRAM, SRAM. relocation
 5Ch	configure possible EMSsee Expanded Memory Specification
 5Dh	reserved
 5Eh	re-test lowest 64K of RAM(Random Access Memory)	See also DRAM, SRAM.
 5Fh	test shadow RAM(Random Access Memory)	See also DRAM, SRAM.
 60h	test CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock.
 61h	test video
 63h	test protected mode interrupts
 64h	test A20(Address line 20) The 80286 and higher CPUs allow addresses in real mode to extend slightly beyond the one megabyte mark, which causes an incompatibility with some older programs which expect such addresses to wrap back to the beginning of the address space.  For complete compatibility with the 8088, newer machines thus contain circuitry which permits the twenty-first address line (A20) to be disabled.  The CPU then effectively has only twenty address lines in real mode, just as the 8088 does, and addresses which would extend beyond the one megabyte mark wrap to the beginning of the address space.  See also High Memory Area, Real Mode.
 65h	memory address line tests
 66h	test base memory
 67h	test extended memory
 68h	test timer interrupt
 69h	test real-time clock
 6Ah	test keyboard controller
 6Bh	test 80287
 6Ch	test RS232
 6Dh	test parallel port
 6Eh	reserved
 6Fh	test floppy disk controller
 70h	test fixed disk controller
 71h	test keylock
 72h	test mouse / pointing device
 73h-8Fh reserved
 90h	setup RAM(Random Access Memory)	See also DRAM, SRAM.
 91h	determine CPU(Central Processing Unit) The microprocessor which executes programs on your computer. speed
 92h	configuration check
 93h	initialize BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
 94h	POD bootstrap
 95h	reset ICs
 96h	setup cache controller
SeeAlso: #P0410,#P0411,#P0412,#P0414,#P1017


(Table P0414)
Values for Intel SE440BX ("Seattle") motherboard POSTsee Power-On Self-Test codes:
 02h	verify real mode
 03h	disable NMIsee Non-Maskable Interrupt
 04h	CPU(Central Processing Unit) The microprocessor which executes programs on your computer. type determination
 06h	system hardware initialization
 08h	chipset initialization (initial POSTsee Power-On Self-Test values)
 09h	set IN-POST flag
 0Ah	CPU(Central Processing Unit) The microprocessor which executes programs on your computer. register initialization
 0Bh	enable CPU(Central Processing Unit) The microprocessor which executes programs on your computer. cache
 0Ch	cache initialization (initial POSTsee Power-On Self-Test values)
 0Eh	I/O component initialization
 0Fh	local-bus IDE(Integrated Drive Electronics) A type of disk drive interface which essentially extends the PCIBM PC's expansion bus all the way to the drive and places the drive controller on the disk drive itself.	 See also ESDI. initialization
 10h	power management initialization
 11h	load alternate rgisters with initial POSTsee Power-On Self-Test values
 12h	warm boot: restore CPU(Central Processing Unit) The microprocessor which executes programs on your computer. control word
 13h	PCI bus-mastering device initialization
 14h	keyboard controller initialization
 16h	checksum BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs.
 17h	cache initialization (before memory autosizing)
 18h	initialize 8254 timer
 1Ah	8237 DMAsee Direct Memory Access controller initialization
 1Ch	programmable interrupt controller reset
 20h	DRAM(Dynamic Random Access Memory) RAM memory which essentially consists of a tiny capacitor for each bit of memory.  Since capacitors do not hold a charge indefinitely, DRAM must be constantly refreshed to avoid losing its contents.  Also, the process of reading the contents of the memory are destructive, meaning extra time must be spent restoring the contents of memory addresses which are accessed, so DRAM is slower than SRAM.  See also Refresh, SRAM. refresh test
 22h	keyboard controller test
 24h	ES register set to 4G flat
 26h	A20(Address line 20) The 80286 and higher CPUs allow addresses in real mode to extend slightly beyond the one megabyte mark, which causes an incompatibility with some older programs which expect such addresses to wrap back to the beginning of the address space.  For complete compatibility with the 8088, newer machines thus contain circuitry which permits the twenty-first address line (A20) to be disabled.  The CPU then effectively has only twenty address lines in real mode, just as the 8088 does, and addresses which would extend beyond the one megabyte mark wrap to the beginning of the address space.  See also High Memory Area, Real Mode. enabled
 28h	DRAM(Dynamic Random Access Memory) RAM memory which essentially consists of a tiny capacitor for each bit of memory.  Since capacitors do not hold a charge indefinitely, DRAM must be constantly refreshed to avoid losing its contents.  Also, the process of reading the contents of the memory are destructive, meaning extra time must be spent restoring the contents of memory addresses which are accessed, so DRAM is slower than SRAM.  See also Refresh, SRAM. autosizing
 29h	POSTsee Power-On Self-Test memory manager initialization
 2Ah	512K base RAM(Random Access Memory)	See also DRAM, SRAM. cleared
 2Ch	RAM(Random Access Memory)	See also DRAM, SRAM. failure on address line xxxx
 2Eh	RAM(Random Access Memory)	See also DRAM, SRAM. failure on data bits xxxx of memory bus low byte
 2Fh	cache enabled before system BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. shadowing
 30h	RAM(Random Access Memory)	See also DRAM, SRAM. failure on data bits xxxx of memory bus high byte
 32h	CPU(Central Processing Unit) The microprocessor which executes programs on your computer. bus-clock frequency test
 33h	POSTsee Power-On Self-Test dispatch manager initialization
 34h	CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. test
 35h	alternate chipset register initialization
 36h	warm start shutdown
 37h	chipset reinitialization (motherboard)
 38h	system BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. shadowing
 39h	cache reinitialization (motherboard)
 3Ah	cache autosizing
 3Ch	advanced chipset register configuration
 3Dh	load alternate registers with CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. values
 40h	initial CPU(Central Processing Unit) The microprocessor which executes programs on your computer. speed set
 42h	interrupt vector initialization
 44h	BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. interrupt initialization
 45h	POSTsee Power-On Self-Test device initialization
 46h	ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. copyright notice check
 47h	PCI option ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. manager initialization
 48h	check video configuration against CMOS RAMA small amount (typically 64 or 128 bytes) of memory in the system's real-time clock chip that is preserved by the clock's battery and is used for storing configuration information.  See also Real-Time Clock. data
 49h	PCI bus and device initialization
 4Ah	video adapter initialization
 4Bh	display QuietBoot screen
 4Ch	vidoe BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. shadowing
 4Eh	display BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. copyright notice
 50h	display CPU(Central Processing Unit) The microprocessor which executes programs on your computer. type and speed
 51h	EISA(Enhanced Industry-Standard Architecture) A 32-bit superset of the IBMInternational Busiuness Machines ATIBM PC AT's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus). motherboard initialization
 52h	keyboard test
 54h	set key click (if enabled)
 56h	enable keyboard
 58h	test for unexpected interrupts
 59h	POSTsee Power-On Self-Test display service initialization
 5Ah	display prompt "Press F2 to enter SETUP"
 5Bh	disable CPU(Central Processing Unit) The microprocessor which executes programs on your computer. cache
 5Ch	RAM(Random Access Memory)	See also DRAM, SRAM. test (512K-640K)
 60h	extended memory test
 62h	extended memory address line test
 64h	jump to UserPatch1
 66h	advanced cache register configuration
 67h	multiprocessor APIC initialization
 68h	enable L1 and L2 caches
 69h	SMM(System Management Mode) A special CPU mode typically invoked on changes in power-supply status.  In this mode, additional hidden memory becomes available for storing the CPU's state and a control program to deal with the needs of power management or other critical events. area setup
 6Ah	display L2 cache size
 6Ch	display	shadow-area message
 6Eh	display possible UMBsee Upper Memory Block recovery high address
 70h	display error messages
 72h	configuration error check
 74h	real-time clock test
 76h	keyboard-error check
 7Ah	test for key lock on
 7Ch	hardware interrupt vector setup
 7Eh	coprocessor initialization (if present)
 80h	disable onboard SuperI/O ports and IRQs
 81h	late POSTsee Power-On Self-Test device initialization
 82h	detect/install external serial ports
 83h	non-MCD IDE(Integrated Drive Electronics) A type of disk drive interface which essentially extends the PCIBM PC's expansion bus all the way to the drive and places the drive controller on the disk drive itself.	 See also ESDI. controller configuration
 84h	detect/install external parallel ports
 85h	PC-compatible PnP ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT.  See also EISA. device initialization
 86h	onboard I/O port reinitialization
 87h	configure motherboard configurable devices
 88h	BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. data area initialization
 89h	enable NMIsee Non-Maskable Interrupt
 8Ah	extended BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. data area initialization
 8Bh	test/initialize PS/2IBM PS/2, any model mouse
 8Ch	diskette controller initialization
 8Fh	determine number of ATA drives
 90h	hard-disk controller initialization
 91h	local-bus hard-disk controller initialization
 92h	jump to UserPatch2
 93h	build MPTABLE for multiprocessor boards
 94h	disable A20(Address line 20) The 80286 and higher CPUs allow addresses in real mode to extend slightly beyond the one megabyte mark, which causes an incompatibility with some older programs which expect such addresses to wrap back to the beginning of the address space.  For complete compatibility with the 8088, newer machines thus contain circuitry which permits the twenty-first address line (A20) to be disabled.  The CPU then effectively has only twenty address lines in real mode, just as the 8088 does, and addresses which would extend beyond the one megabyte mark wrap to the beginning of the address space.  See also High Memory Area, Real Mode. (Release 5.1 and earlier)
 95h	install CD-ROM for boot
 96h	clear ES 4G segment register
 97h	multiprocessor table fixup
 98h	option ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. search
 99h	check for SMART drive
 9Ah	option ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. shadowing
 9Ch	power management setup
 9Eh	enable hardware interrupts
 9Fh	determine number of ATA and SCSI(Small Computer Systems Interface) A system-independent expansion bus typically used to connect hard disks, tape drives, and CD-ROMs to a computer.	A host adapter connects the SCSI bus to the computer's own bus.  See also ESDI, IDE. devices
 A0h	set time of day
 A2h	check key lock
 A4h	typematic rate initialization
 A8h	erase F2 prompt
 AAh	test for F2 keystroke
 ACh	enter SETUP
 AEh	clear IN-POST flag
 B0h	check for errors
 B2h	preparing to boot OS - POSTsee Power-On Self-Test complete
 B4h	short beep before booting
 B5h	terminate QuietBoot
 B6h	password check (optional)
 B8h	clear global descriptor table
 B9h	clean up all graphics
 BAh	DMI parameter initialization
 BBh	PnP option ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. initialization
 BCh	clear parity checkers
 BDh	display MultiBoot menu
 BEh	clear screen (optional)
 BFh	check virusA program which attaches itself to other programs for the purpose of duplicating itself.	Viruses often (but not always) contain harmful code which is triggered by some event, after a certain number of reproductions, or on a specific date.  See also worm. and backup reminders
 C0h	INT 19 boot attempt
 C1h	POSTsee Power-On Self-Test Error Manager (PEM) initialization
 C2h	error logging initialization
 C3h	error display function initialization
 C4h	system error handler initialization
 E0h	chipset initialization
 E1h	bridge initialization
 E2h	processor initialization
 E3h	system timer initialization
 E4h	system I/O initialization
 E5h	check force recovery boot
 E6h	BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. checksumming
 E7h	go to BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
 E8h	set huge segment
 E9h	multiprocessor initialization
 EAh	OEM(Original Equipment Manufacturer) a company which purchases components that are resold as part of its own products under the company's own brand name, e.g. a Gateway 2000-branded monitor may actually be a Mag or NEC monitor. special code initialization
 EBh	PIC and DMAsee Direct Memory Access initialization
 ECh	memory type initialization
 EDh	memory size initialization
 EEh	boot block shadowing
 EFh	system memory test
 F0h	interrupt vector initialization
 F1h	real-time clock initialization
 F2h	video initialization
 F3h	beeper initialization
 F4h	initialize boot
 F5h	clear huge segment
 F6h	boot to mini-DOS
 F7h	boot to full DOS
SeeAlso: #P0413,#P1017


(Table P1017)
Values for Microid Research MR-BIOS POSTsee Power-On Self-Test codes:
 00h	starting cold boot
 01h	OEM-specific hook #0 (typically chipset reset)
 02h	disable critical I/O devices (6845, 8327s, floppy, and parity latches)
 03h	BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. checksum test (beep code LH-LLL; L=low tone, H=high tone)
 04h	test page registers (PORTIBM PC Portable (uses same BIOS as XT) 0081h-008Fh) (beep code LH-HLL)
 05h	keyboard controller self-test (beep code LH-LHL)
 06h	gang port initialization (both 8237s, both 7254s, RTCsee Real-Time Clock registers
	  0Fh/0Ah, and both 8259s)
 07h	OEM-specific hook #1 (typically cache and shadow RAM(Random Access Memory)	See also DRAM, SRAM. disable)
 08h	test refresh toggle (beep code LH-HHL)
 09h	pattern test both 8237s (beep code LH-LLH)	
 0Ah	test first 64K RAM(Random Access Memory)	See also DRAM, SRAM. (beep code LH-LLLL or LH-HLLL)
 0Bh	pattern test both 8259s mask registers
	(beep code LH-HHHL [master] or LH-LLLH [slave])
 0Ch	test 8259 IRQs and purge powerup interrupts
 0Dh	test and init 8254 channel 0
 0Eh	test 8254 channel 2 and speaker circuitry
 0Fh	test and init RTCsee Real-Time Clock
 10h	initialize video
 11h	text CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. checksum
 12h	display signon message, accept keyboard selftest result, attempt
	  to initialize keyboard
 13h	OEM-specific hook #2 (typically 8MHz-bus select)
 14h	size and test base memory
 15h	second attempt to initialize keyboard, if necessary
 16h	OEM-specific hook #3 (typically cache sizing/test)
 17h	test A20(Address line 20) The 80286 and higher CPUs allow addresses in real mode to extend slightly beyond the one megabyte mark, which causes an incompatibility with some older programs which expect such addresses to wrap back to the beginning of the address space.  For complete compatibility with the 8088, newer machines thus contain circuitry which permits the twenty-first address line (A20) to be disabled.  The CPU then effectively has only twenty address lines in real mode, just as the 8088 does, and addresses which would extend beyond the one megabyte mark wrap to the beginning of the address space.  See also High Memory Area, Real Mode. gate
 18h	size and test extended memory
 19h	OEM-specific hook #4 (size/test "special" OEM(Original Equipment Manufacturer) a company which purchases components that are resold as part of its own products under the company's own brand name, e.g. a Gateway 2000-branded monitor may actually be a Mag or NEC monitor. memory)
 1Ah	test RTCsee Real-Time Clock update-in-progress flag and validate time
 1Bh	determine serial ports
 1Ch	determine parallel ports
 1Dh	determine/initialize coprocessor
 1Eh	floppy controller test/determination and CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. validation
 1Fh	determine/test fixed disk controller, validate CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. settings
 20h	rigorous CMOS(Complementary Metal-Oxide-Semiconductor) A type of integrated circuit design known for its low power consumption. parameter validation
 21h	check frnot-panel lock, wait for user acknowledgement of errors
 22h	set NumLock, password-security trap, dispatch to setup utility
 23h	OEM-specific hook #5
 24h	set keyboard typematic rate
 25h	initialize floppy subsystem
 26h	initialize fixed-disk subsystem
 27h	ACK errors, set primary adapter's video mode
 28h	OEM-specific hook #6 (typically enable shaow RAM(Random Access Memory)	See also DRAM, SRAM., cache, turbo mode)
 29h	disable A20(Address line 20) The 80286 and higher CPUs allow addresses in real mode to extend slightly beyond the one megabyte mark, which causes an incompatibility with some older programs which expect such addresses to wrap back to the beginning of the address space.  For complete compatibility with the 8088, newer machines thus contain circuitry which permits the twenty-first address line (A20) to be disabled.  The CPU then effectively has only twenty address lines in real mode, just as the 8088 does, and addresses which would extend beyond the one megabyte mark wrap to the beginning of the address space.  See also High Memory Area, Real Mode., set low stack, init ROMs at C800-E000
 2Ah	ACK errors, set video mode, set DOS time from RTCsee Real-Time Clock
 2Bh	enable parity checking and NMIsee Non-Maskable Interrupt
 2Ch	init ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. at E000
 2Dh	ACK errors
 2Eh	OEM-specific hook #7 (typically init built-in EMSsee Expanded Memory Specification)
 2Fh	passing control to INT 19h
SeeAlso: #0410,#0414