RBIL61 - FLUSH CACHE

RBIL61 - FLUSH CACHE

INT 13 - FAST! v4.02+ - API(Application Program[ming] Interface) The defined set of calls which a program may make to interact with or request services of the operating system or environment under which it is running. Because the inputs and outputs of the calls are well-defined, a program using the API can continue using the identical calls even if the internal organization of the program providing the API changes. {#idx11029}

INT 13 - QUICKCACHE II v4.20 - FLUSH CACHE {partially documented} {#idx9793}

INT 13 - Super PC-Kwik v3.20+ - FLUSH CACHE {#idx11265}

INT 16 - PC-Cache v6+ - FLUSH CACHE {#idx27735}

INT 16 - PC-Cache v6+ - FLUSH CACHE AND DISABLE DELAYED WRITES {#idx27703}

INT 21 - Brian Antoine Seagate ST-01 SCSI(Small Computer Systems Interface) A system-independent expansion bus typically used to connect hard disks, tape drives, and CD-ROMs to a computer. A host adapter connects the SCSI bus to the computer's own bus. See also ESDI, IDE..SYS - IOCTL - EXECUTE COMMANDS {#idx48466}

INT 21 - SMARTDRV.SYS v3.x only - IOCTL - CACHE CONTROL {#idx47802}

INT 21 - SMARTDRV.SYS v3.x only - IOCTL - GET CACHE STATUS {#idx46331}

INT 2F - CDBLITZ v2.11 - FLUSH CACHE {undocumentedInformation about a product which is not publicly available from the manufacturer, and must be determined by reverse-engineering (disassembly, trial-and-error, etc.). Undocumented information tends to change -- often dramatically -- between successive revisions of a product, since the manufacturer has no obligation to maintain compatibility in behavior which is not explicitly stated.} {#idx78989}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0005h - Pentium - (TR3) CACHE DATA TEST REGISTER {#idx165119}