INT 1A - PCI BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. v2.0c+ - READ CONFIGURATION DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. (PicoPower devices)
AX = B10Ah subfn 1066h
BH = bus number
BL = device/function number (bits 7-3 device, bits 2-0 function)
DI = register number (0000h-00FFh) (see #00878)
Return: CF clear if successful
ECX = dword read
CF set on error
AH = status (00h,87h) (see #00729)
EAX, EBX, ECX, and EDX may be modified
all other flags (except IF) may be modified
Notes: this function may require up to 1024 byte of stack; it will not enable
interrupts if they were disabled before making the call
the meanings of BL and BH on entry were exchanged between the initial
drafts of the specification and final implementation
SeeAlso: AX=B10Ah,AX=B10Ah/SF=8086h
Format of PicoPower Vesuvius V3-LS ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. Bridge configuration:
Offset Size Description (Table 00971)
00h 64 BYTEs header (see #00878)
(vendor ID 1066h, device ID 0002h or 8002h)
40h WORD distributed DMAsee Direct Memory Access control register (see #00972)
42h BYTE distributed DMAsee Direct Memory Access status register (see #00973)
44h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH0 base register (see #00974)
48h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH1 base register (see #00974)
4Ch DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH2 base register (see #00974)
50h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH3 base register (see #00974)
54h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH5 base register (see #00974)
58h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH6 base register (see #00974)
5Ch DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. slave DMAC CH7 base register (see #00974)
90h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. PCI-to-ISA bridge configuration register (see #00975)
94h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory address positive decode (see #00976)
98h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. I/O address positive decode (see #00977)
9Ch WORD I/O configuration address register (see #00978)
A0h DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. programmable ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. I/O address decoder (see #00979)
A4h 6 DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. programmable ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder registers 1-6 (see #00980)
C0h 64 BYTEs reserved
SeeAlso: #00773
Bitfields for PicoPower Vesuvius V3-LS distributed DMAsee Direct Memory Access control register:
Bit(s) Description (Table 00972)
15-6 reserved
5 (revision BB & later) secondary slave floppy disk distributed access
enable (if bit 1 = 0)
4 (revision BB & later) secondary slave hard disk distributed access
enable (if bit 1 = 0)
3 slave floppy drive port distributed access enable (if bit 1 = 0)
2 slave hard drive port distributed access enable (if bit 1 = 0)
1 distributed DMAsee Direct Memory Access mode
0 = master
1 = slave
0 distributed DMAsee Direct Memory Access function enable
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS distributed DMAsee Direct Memory Access status register:
Bit(s) Description (Table 00973)
7-1 reserved
0 DDMA status (write 1 to clear)
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS slave DMAC CH0-7 base register:
Bit(s) Description (Table 00974)
31-16 reserved (0)
15-7 channel base address
6-4 channel base address (hardwired to channel number)
3 extended address (0)
2-1 size (00 for channel 0-3, 01 for channel 5-7)
0 channel enable
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS PCI-to-ISA bridge configuration:
Bit(s) Description (Table 00975)
31-15 reserved
14 AD/SD/SA bus staggering enable
13 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. bridge PCI positive decode enable
12 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. bridge PCI subtractive decode disable
11-10 reserved
9 retry enable
8 lock input enable
7 SERR#/NMIsee Non-Maskable Interrupt status flag (write 1 to clear)
6 PERR#/NMIsee Non-Maskable Interrupt status flag (write 1 to clear)
5 SERR# triggers NMIsee Non-Maskable Interrupt enable
4 PERR# triggers NMIsee Non-Maskable Interrupt enable
3 reserved
2-0 (revision BB and later) system configuration setting
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory address positive decode:
Bit(s) Description (Table 00976)
31-9 reserved
8 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory A0000h-AFFFFh and FFA0000h-FFFAFFFFh decode enable
7 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory B0000h-BFFFFh and FFB0000h-FFFBFFFFh decode enable
6 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory C0000h-C7FFFh and FFC0000h-FFFC7FFFh decode enable
5 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory C8000h-CFFFFh and FFC8000h-FFFCFFFFh decode enable
4 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory D0000h-D7FFFh and FFD0000h-FFFD7FFFh decode enable
3 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory D8000h-DFFFFh and FFD8000h-FFFDFFFFh decode enable
2 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory E0000h-E7FFFh and FFE0000h-FFFE7FFFh decode enable
1 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory E8000h-EFFFFh and FFE8000h-FFFEFFFFh decode enable
0 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. memory F0000h-FFFFFh and FFF0000h-FFFFFFFFh decode enable
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS I/O address positive decode:
Bit(s) Description (Table 00977)
31-24 reserved
23 (revision BB and later) I/O read 377h decode enable
22 (revision BB and later) I/O read 3F7h decode enable
21 PCIBM PC NET (360h-36Fh) decode enable
20 audio 5 (388h-38Bh) decode enable
19 audio 4 (250h-25Fh) decode enable
18 audio 3 (240h-24Fh) decode enable
17 audio 2 (230h-23Fh) decode enable
16 audio 1 (220h-22Fh) decode enable
15 audio 0 (201h) decode enable
14 (revision BB and later) ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. secondary floppy (370h-375h, 377h write)
decode enable
13 (revision BB and later) ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. primary floppy (3F0h-3F5h, 3F7h write)
decode enable
12 (revision BB and later) ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. secondary IDE(Integrated Drive Electronics) A type of disk drive interface which essentially extends the PCIBM PC's expansion bus all the way to the drive and places the drive controller on the disk drive itself. See also ESDI. (170h-177h, 376h) decode
enable
11 (revision BB and later) ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. primary IDE(Integrated Drive Electronics) A type of disk drive interface which essentially extends the PCIBM PC's expansion bus all the way to the drive and places the drive controller on the disk drive itself. See also ESDI. (1F0h-1F7h, 3F6h) decode enable
10 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. LPT3 (3BCh-3BFh, 7BCh-7BEh) decode enable
9 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. LPT2 (278h-27Fh, 678h-67Ah) decode enable
8 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. LPT1 (378h-37Fh, 778h-77Ah) decode enable
7 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. COM4 (2E8h-2EFh) decode enable
6 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. COM3 (3E8h-3EFh) decode enable
5 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. COM2 (2F8h-2FFh) decode enable
4 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. COM1 (3F8h-3FFh) decode enable
3 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. system I/O (00h-FFh) decode enable
2 configuration (24h/26h) decode enable
1-0 reserved
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS I/O configuration address register:
Bit(s) Description (Table 00978)
15-10 reserved
9-1 configuration I/O address
0 configuration address register enable
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS programmable ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. I/O address decoder:
Bit(s) Description (Table 00979)
31-18 reserved
17 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 6 read enable
16 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 6 write enable
15 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 6 type
0 = memory
1 = I/O
14 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 5 read enable
13 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 5 write enable
12 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 5 type (same values as bit 15)
11 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 4 read enable
10 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 4 write enable
9 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 4 type (same values as bit 15)
8 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 3 read enable
7 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 3 write enable
6 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 3 type (same values as bit 15)
5 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 2 read enable
4 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 2 write enable
3 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 2 type (same values as bit 15)
2 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 1 read enable
1 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 1 write enable
0 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 1 type (same values as bit 15)
SeeAlso: #00971
Bitfields for PicoPower Vesuvius V3-LS programmable ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. range decoder 1:
Bit(s) Description (Table 00980)
31-16 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. address compare
15-0 ISA(Industry-Standard Architecture) The expansion bus used by the IBMInternational Busiuness Machines PCIBM PC/ATIBM PC AT. See also EISA. device address (memory address bits 23-8, I/O address bits 15-0)
SeeAlso: #00971