INT 1A - PCI BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware.  The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. v2.0c+ - READ CONFIGURATION DWORDDoubleword; four bytes.	 Commonly used to hold a 32-bit segment:offset or selector:offset address. (Adaptec devices)
	AX = B10Ah subfn 9004h
	BH = bus number
	BL = device/function number (bits 7-3 device, bits 2-0 function)
	DI = register number (0000h-00FFh) (see #01241)
Return: CF clear if successful
	    ECX = dword read
	CF set on error
	AH = status (00h,87h) (see #00729)
	EAX, EBX, ECX, and EDX may be modified
	all other flags (except IF) may be modified
Notes:	this function may require up to 1024 byte of stack; it will not enable
	  interrupts if they were disabled before making the call
	the meanings of BL and BH on entry were exchanged between the initial
	  drafts of the specification and final implementation
SeeAlso: AX=B10Ah,AX=B10Ah/SF=8086h


Format of PCI Configuration Data for AIC-78xx PCI SCSI(Small Computer Systems Interface) A system-independent expansion bus typically used to connect hard disks, tape drives, and CD-ROMs to a computer.	A host adapter connects the SCSI bus to the computer's own bus.  See also ESDI, IDE. controllers:
Offset	Size	Description	(Table 01241)
 00h 64 BYTEs	header (see #00878)
		(vendor ID 9004h) (see #00875 for device ID)
 40h	WORD	device configuration register (DEVCONFIG) (see #01242)
SeeAlso: #00734,PORTIBM PC Portable (uses same BIOS as XT) xxxxh"Adaptec AIC-78xx"


Bitfields for AIC-78xx device configuration register (DEVCONFIG):
Bit(s)	Description	(Table 01242)
 15-11	reserved
 10	(AIC-787x+) multi-port mode (MPORTMODE)
 9	(AIC-787x+) external SRAM(Static Random Access Memory)  RAM which typically consists of one flip-flop per bit of memory.  Unlike DRAMs, static RAM retains its contents as long as power is applied.  Because there is no need to refresh the contents of memory addresses which are read, SRAM is faster than DRAM, but it is more expensive and typically is available in much smaller sizes than DRAM because each bit occupies more space on the chip.  See also DRAM. present? (RAMPSM)
 8	"VOLSENSE"
 7	SCB RAM(Random Access Memory)	See also DRAM, SRAM. select (SCBRAMSEL)
 6	"MRDCEN"
 5	(AIC-787x+) external SCB SRAM(Static Random Access Memory)  RAM which typically consists of one flip-flop per bit of memory.  Unlike DRAMs, static RAM retains its contents as long as power is applied.  Because there is no need to refresh the contents of memory addresses which are read, SRAM is faster than DRAM, but it is more expensive and typically is available in much smaller sizes than DRAM because each bit occupies more space on the chip.  See also DRAM. access time  (EXTSCBTIME)
 4	(AIC-787x+) external SCB SRAM(Static Random Access Memory)  RAM which typically consists of one flip-flop per bit of memory.  Unlike DRAMs, static RAM retains its contents as long as power is applied.  Because there is no need to refresh the contents of memory addresses which are read, SRAM is faster than DRAM, but it is more expensive and typically is available in much smaller sizes than DRAM because each bit occupies more space on the chip.  See also DRAM. parity enable (EXTSCBPEN)
 3	"BERREN"
 2	"DACEN"
 1	SCSI(Small Computer Systems Interface) A system-independent expansion bus typically used to connect hard disks, tape drives, and CD-ROMs to a computer.	A host adapter connects the SCSI bus to the computer's own bus.  See also ESDI, IDE. terminator power level (STPWLEVEL)
 0	(AIC-787x+) differential active negation enable (DIFACTNEGEN)
Note:	clearing bit 7 allows access to the external SCB SRAM(Static Random Access Memory)  RAM which typically consists of one flip-flop per bit of memory.  Unlike DRAMs, static RAM retains its contents as long as power is applied.  Because there is no need to refresh the contents of memory addresses which are read, SRAM is faster than DRAM, but it is more expensive and typically is available in much smaller sizes than DRAM because each bit occupies more space on the chip.  See also DRAM.
SeeAlso: #01241