Interrupt List - Release 61 (16jul00)
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AMD-K5
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RBIL61 - AMD-K5
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0082h - AMD Am5k86
(AMD-K5)
- ARRAY ACCESS REGISTER
{#idx165559}
{#idx165563}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0083h - AMD Am5k86
(AMD-K5)
- HARDWARE CONFIGURATION REGISTER
{#idx165616}
{#idx165619}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0085h - AMD-K5 - WRITE ALLOCATE TOP-OF-MEMORY AND CONTROL REGISTER
{#idx165636}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0086h - AMD-K5 - WRITE ALLOCATE PROGRAMMABLE MEMORY RANGE REGISTER
{#idx165646}
System-management mode
{#idx166807}