Interrupt List - Release 61 (16jul00)
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ENABLE CACHE
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RBIL61 - ENABLE CACHE
INT 13 - FAST! v4.02+ -
API
(Application Program[ming] Interface) The defined set of calls which a program may make to interact with or request services of the operating system or environment under which it is running. Because the inputs and outputs of the calls are well-defined, a program using the API can continue using the identical calls even if the internal organization of the program providing the API changes.
{#idx11020}
INT 13 - Super PC-Kwik v5.10+ - ENABLE CACHE
{
undocumented
Information about a product which is not publicly available from the manufacturer, and must be determined by reverse-engineering (disassembly, trial-and-error, etc.). Undocumented information tends to change -- often dramatically -- between successive revisions of a product, since the manufacturer has no obligation to maintain compatibility in behavior which is not explicitly stated.
}
{#idx11313}
INT 16 - Compaq Systempro and higher - ENABLE CACHE CONTROLLER
{#idx27106}
INT 16 - PC-Cache v6+ - ENABLE CACHE
{#idx27729}
INT 1A - PCI
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
v2.0c+ - READ CONFIGURATION
DWORD
Doubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address.
(VIA Technologies devices)
{#idx34602}
INT 2F - CDBLITZ v2.11 - ENABLE CACHE
{
undocumented
Information about a product which is not publicly available from the manufacturer, and must be determined by reverse-engineering (disassembly, trial-and-error, etc.). Undocumented information tends to change -- often dramatically -- between successive revisions of a product, since the manufacturer has no obligation to maintain compatibility in behavior which is not explicitly stated.
}
{#idx78961}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:011Eh - Pentium II -
"BBL_CR_CTL3"
L2 CACHE CONTROL REGISTER 3
{#idx165912}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:1000h -
IBM
International Busiuness Machines
International Busiuness Machines) A hardware, software and other service technology company founded in 1911.
386/486 SLC - PROCESSOR OPERATION REGISTER
{#idx166378}
{#idx166385}
{#idx166393}
Opcodes List
{#idx174790}
{#idx174902}
PORT
IBM PC Portable (uses same BIOS as XT)
0022-0024 - CHIPSET FROM PICO POWER, UMC or PCChips
{#idx134938}