Interrupt List - Release 61 (16jul00)
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CPU
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RBIL61 - CPU
86 Bugs List
{#idx175887}
{#idx175889}
{#idx175897}
{#idx175910}
{#idx175913}
{#idx175917}
{#idx175968}
{#idx175998}
{#idx176003}
{#idx176006}
{#idx176024}
{#idx176030}
{#idx176048}
{#idx176051}
{#idx176055}
{#idx176064}
{#idx176066}
{#idx176069}
{#idx176084}
{#idx176087}
{#idx176137}
{#idx176163}
{#idx176170}
{#idx176175}
{#idx176185}
{#idx176192}
{#idx176226}
{#idx176310}
{#idx176370}
{#idx176393}
{#idx176396}
{#idx176417}
{#idx176420}
{#idx176435}
{#idx176441}
{#idx176446}
{#idx176453}
{#idx176464}
{#idx176505}
{#idx176508}
{#idx176509}
{#idx176547}
Advertisements
{#idx177152}
CALL xxxxh:xxxxh - Plug-and-Play
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
v1.0A
{#idx160177}
I2C
(also IIC; the "2" is superscripted) Inter-Integrated Circuit Bus -- A moderate-speed serial communications bus originally invented by Philips in the early 1980s for consumer-electronics applications, such as inter-chip communication in a television set or high-end stereo. The I2C bus has recently appeared on PCs in video capture boards and similar devices, as well as (surprisingly) SDRAM DIMMs (for the on-board serial EEPROM). The ACCESS.bus is a derivative of the I2C bus which forms the physical layer of the Universal Serial Bus. Similary, the SMBus (System Management Bus) also uses I2C as its physical layer.
A2h - Pentium Pro/II/III - Processor Information
ROM
(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs.
{#idx172245}
INT 00 - CPU-generated - DIVIDE ERROR
{callout or callback}
{#idx16}
INT 01 - CPU-generated - SINGLE STEP
{callout or callback}
{#idx39}
{#idx54}
INT 03 - CPU-generated - BREAKPOINT
{callout or callback}
{#idx174}
INT 04 - CPU-generated - INTO DETECTED OVERFLOW
{callout or callback}
{#idx440}
INT 05 - CPU-generated
(80186+)
- BOUND RANGE EXCEEDED
{callout or callback}
{#idx470}
INT 06 - CPU-generated
(80186+)
- INVALID OPCODE
{callout or callback}
{#idx519}
INT 07 - CPU-generated
(80286+)
- PROCESSOR EXTENSION NOT AVAILABLE
{callout or callback}
{#idx565}
INT 08 - CPU-generated
(80286+)
- DOUBLE EXCEPTION DETECTED
{callout or callback}
{#idx605}
INT 09 - CPU-generated
(80286,80386)
- PROCESSOR EXTENSION PROTECTION ERROR
{callout or callback}
{#idx777}
INT 0A - CPU-generated
(80286+)
- INVALID TASK STATE SEGMENT
{callout or callback, protected mode}
{#idx883}
INT 0B - CPU-generated
(80286+)
- SEGMENT NOT PRESENT
{callout or callback, protected mode}
{#idx936}
INT 0C - CPU-generated
(80286+)
- STACK FAULT
{callout or callback}
{#idx988}
INT 0D - CPU-generated
(80286+)
- GENERAL PROTECTION VIOLATION
{callout or callback}
{#idx1104}
INT 0E - CPU-generated
(80386+ native mode)
- PAGE FAULT
{callout or callback}
{#idx1158}
INT 10 - CPU-generated
(80286+)
- COPROCESSOR ERROR
{callout or callback}
{#idx1210}
INT 11 - CPU-generated
(80486+)
- ALIGNMENT CHECK
{#idx7411}
INT 12 - CPU-generated
(Pentium +)
- MACHINE CHECK EXCEPTION
{#idx7759}
INT 15 -
AMI
American Megatrends, Inc.
(American Megatrends, Inc.) A hardware, software and firmware company founded in 1985.
PCI
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
- GET
CPU
(Central Processing Unit) The microprocessor which executes programs on your computer.
TYPE AND SPEED
{
undocumented
Information about a product which is not publicly available from the manufacturer, and must be determined by reverse-engineering (disassembly, trial-and-error, etc.). Undocumented information tends to change -- often dramatically -- between successive revisions of a product, since the manufacturer has no obligation to maintain compatibility in behavior which is not explicitly stated.
}
{#idx23747}
INT 15 - Intel Pentium Pro
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
UPDATE - WRITE
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
UPDATE AREA
{real mode}
{#idx23208}
{#idx23216}
INT 1A - PCI
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
v2.0c+ - READ CONFIGURATION
DWORD
Doubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address.
(Intel devices)
{#idx35516}
{#idx35522}
{#idx35734}
{#idx36042}
{#idx36483}
{#idx36826}
{#idx37122}
{#idx37128}
{#idx38437}
{#idx38441}
INT 1A - PCI
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
v2.0c+ - READ CONFIGURATION
DWORD
Doubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address.
(OPTi devices)
{#idx33555}
{#idx33641}
{#idx33646}
{#idx33723}
{#idx33910}
INT 1A - PCI
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
v2.0c+ - READ CONFIGURATION
DWORD
Doubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address.
(VIA Technologies devices)
{#idx34461}
{#idx34487}
{#idx34550}
{#idx34553}
{#idx34722}
{#idx34760}
{#idx34767}
{#idx34772}
{#idx34787}
{#idx34977}
INT 21 - Novell NetWare v4+ - GET
CPU
(Central Processing Unit) The microprocessor which executes programs on your computer.
INFORMATION
{#idx70592}
INT 2F - POWER.EXE - GET STATISTICS
{
undocumented
Information about a product which is not publicly available from the manufacturer, and must be determined by reverse-engineering (disassembly, trial-and-error, etc.). Undocumented information tends to change -- often dramatically -- between successive revisions of a product, since the manufacturer has no obligation to maintain compatibility in behavior which is not explicitly stated.
}
{#idx85601}
{#idx85606}
INT 78 - HugeRealMode Driver - GET ENTRY POINT
{#idx122134}
INT 7F - Alloy ANSK, NTNX, MW386 - GET USER NUMBER
{#idx124865}
Interrupt Primer
{#idx176817}
MEM xxxxh:xxx0h - Multiprocessor Specification - FLOATING POINTER STRUCTURE
{#idx164337}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:000Eh - Pentium, K6, C6 -
(TR12)
NEW FEATURE CONTROL
{#idx165058}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0010h - Pentium, Pentium Pro - TIME STAMP COUNTER REGISTER
{#idx165092}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0014h - Pentium P54C - bug?
{#idx165226}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:008Bh - Pentium Pro -
"BIOS_SIGN"
BIOS
(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly.
UPDATE SIGNATURE
{#idx165458}
{#idx165465}
{#idx165467}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0107h - Centaur
(
IDT
see Interrupt Descriptor Table
)
WinChip C6/WinChip2 - Feature Control Register #1
{#idx165511}
{#idx165533}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0108h - Centaur
(
IDT
see Interrupt Descriptor Table
)
C6/WinChip2 - Feature Control Register #2
{#idx165549}
{#idx165550}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0109h - Centaur
(
IDT
see Interrupt Descriptor Table
)
C6/WinChip2 - Feature Control Register #3
{#idx165560}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0179h - Pentium Pro -
"MCG_CAP"
MACHINE CHECK GLOBAL CAPABILITY
{#idx165760}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0186h - Pentium Pro -
"EVNTSEL0"
- PERFORM. COUNTER EVENT SELECTION 0
{#idx165816}
{#idx165820}
{#idx165821}
{#idx165822}
{#idx165823}
{#idx165825}
{#idx165826}
{#idx165828}
{#idx165830}
{#idx165831}
{#idx165832}
{#idx165833}
{#idx165834}
{#idx165836}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
0000h:0277h - PentiumII - Page Attribute Table
{#idx166009}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
C000h:0080h - AMD K6 - EXTENDED FEATURE ENABLE REGISTER
{#idx166408}
MSR
(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors.
C000h:0081h - AMD K6 - SYSCALL TARGET ADDRESS
{#idx166414}
Opcodes List
{#idx172448}
{#idx172693}
{#idx172696}
{#idx172697}
{#idx172698}
{#idx172699}
{#idx172701}
{#idx172705}
{#idx172749}
{#idx172751}
{#idx172775}
{#idx172776}
{#idx172780}
{#idx172789}
{#idx172790}
{#idx172812}
{#idx172821}
{#idx172830}
{#idx172841}
{#idx172851}
{#idx172859}
{#idx172868}
{#idx172877}
{#idx172889}
{#idx172896}
{#idx172897}
{#idx173014}
{#idx173021}
{#idx173247}
{#idx174352}
{#idx174356}
{#idx174357}
{#idx174412}
{#idx174429}
{#idx174444}
{#idx174445}
{#idx174754}
{#idx174765}
{#idx174767}
{#idx174770}
{#idx174838}
{#idx174845}
{#idx174848}
{#idx174876}
{#idx174932}
{#idx174937}
{#idx174939}
{#idx175021}
{#idx175071}
{#idx175081}
{#idx175084}
{#idx175092}
{#idx175093}
{#idx175107}
{#idx175129}
{#idx175135}
{#idx175138}
{#idx175145}
{#idx175147}
{#idx175151}
{#idx175165}
{#idx175254}
{#idx175262}
{#idx175298}
{#idx175303}
{#idx175306}
{#idx175313}
{#idx175326}
{#idx175329}
{#idx175356}
{#idx175458}
{#idx175460}
{#idx175506}
{#idx175605}
{#idx175609}
{#idx175614}
{#idx175618}
{#idx175712}
{#idx175722}
{#idx175772}
{#idx175778}
{#idx175780}
{#idx175856}
PORT
IBM PC Portable (uses same BIOS as XT)
0022-0023 - CHIP SET DATA
{#idx133422}
PORT
IBM PC Portable (uses same BIOS as XT)
0022-0024 - CHIPSET FROM PICO POWER, UMC or PCChips
{#idx134752}
{#idx135094}
{#idx135218}
{#idx135221}
{#idx135335}
{#idx135337}
{#idx135339}
{#idx135464}
{#idx135604}
{#idx135606}
{#idx135627}
{#idx135760}
{#idx136312}
{#idx136320}
{#idx136385}
{#idx136753}
{#idx136875}
{#idx137034}
{#idx137038}
{#idx137045}
{#idx137064}
PORT
IBM PC Portable (uses same BIOS as XT)
00F0-00FF - MATH COPROCESSOR
(8087..80387)
{#idx142198}
PORT
IBM PC Portable (uses same BIOS as XT)
0330-0333 - Adaptec 154xB/154xC
SCSI
(Small Computer Systems Interface) A system-independent expansion bus typically used to connect hard disks, tape drives, and CD-ROMs to a computer. A host adapter connects the SCSI bus to the computer's own bus. See also ESDI, IDE.
adapter
(default address)
{#idx145684}
PORT
IBM PC Portable (uses same BIOS as XT)
03CE-03CF -
EGA
Enhanced Graphics Adapter
(Enhanced Graphics Adapter)
IBM
International Busiuness Machines
's second color video board for the
IBM
International Busiuness Machines
PC
IBM PC
family, capable of a maximum resolution of 640x350 pixels in 16 simultaneous colors of a total of 64 possible colors.
/
VGA
Video Graphics Array
(Video Graphics Array) The video adapter introduced with the
IBM
International Busiuness Machines
PS/2
IBM PS/2, any model
series of computers.
/
MCGA
Multi-Color Graphics Array
(Multi-Color Graphics Array) The low-end color adapter offered in
IBM
International Busiuness Machines
's early
PS/2
IBM PS/2, any model
series machines.
- GRAPHICS CONTROLLER REGISTERS
{#idx148757}
PORT
IBM PC Portable (uses same BIOS as XT)
1C00-1CBF - Adaptec AIC-777x
EISA
(Enhanced Industry-Standard Architecture) A 32-bit superset of the
IBM
International Busiuness Machines
AT
IBM PC AT
's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus).
SCSI
(Small Computer Systems Interface) A system-independent expansion bus typically used to connect hard disks, tape drives, and CD-ROMs to a computer. A host adapter connects the SCSI bus to the computer's own bus. See also ESDI, IDE.
controller in
EISA
(Enhanced Industry-Standard Architecture) A 32-bit superset of the
IBM
International Busiuness Machines
AT
IBM PC AT
's expansion bus (which is now known as the ISA or Industry-Standard Architecture bus).
slot 1
{#idx154071}
{#idx154177}