RBIL61 - Pentium

86 Bugs List {#idx176110}{#idx176112}{#idx176275}{#idx176278}{#idx176293}{#idx176294}{#idx176295}{#idx176298}{#idx176300}{#idx176305}{#idx176307}{#idx176310}{#idx176336}{#idx176353}{#idx176364}{#idx176370}{#idx176382}{#idx176399}{#idx176629}{#idx176637}{#idx176648}{#idx176726}{#idx176728}{#idx176783}{#idx176787}

Bibliography {#idx167481}{#idx167482}{#idx167550}{#idx167657}{#idx167660}{#idx167763}

CALL xxxxh:xxxxh - Plug-and-Play BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. v1.0A {#idx160394}{#idx160398}{#idx160401}{#idx160541}

I2C(also IIC; the "2" is superscripted) Inter-Integrated Circuit Bus -- A moderate-speed serial communications bus originally invented by Philips in the early 1980s for consumer-electronics applications, such as inter-chip communication in a television set or high-end stereo. The I2C bus has recently appeared on PCs in video capture boards and similar devices, as well as (surprisingly) SDRAM DIMMs (for the on-board serial EEPROM). The ACCESS.bus is a derivative of the I2C bus which forms the physical layer of the Universal Serial Bus. Similary, the SMBus (System Management Bus) also uses I2C as its physical layer. 30h - Pentium II/III - THERMAL SENSOR {#idx170414}{#idx170449}{#idx170453}{#idx171966}{#idx171970}

I2C(also IIC; the "2" is superscripted) Inter-Integrated Circuit Bus -- A moderate-speed serial communications bus originally invented by Philips in the early 1980s for consumer-electronics applications, such as inter-chip communication in a television set or high-end stereo. The I2C bus has recently appeared on PCs in video capture boards and similar devices, as well as (surprisingly) SDRAM DIMMs (for the on-board serial EEPROM). The ACCESS.bus is a derivative of the I2C bus which forms the physical layer of the Universal Serial Bus. Similary, the SMBus (System Management Bus) also uses I2C as its physical layer. 34h - Pentium II/III - THERMAL SENSOR {#idx170418}

I2C(also IIC; the "2" is superscripted) Inter-Integrated Circuit Bus -- A moderate-speed serial communications bus originally invented by Philips in the early 1980s for consumer-electronics applications, such as inter-chip communication in a television set or high-end stereo. The I2C bus has recently appeared on PCs in video capture boards and similar devices, as well as (surprisingly) SDRAM DIMMs (for the on-board serial EEPROM). The ACCESS.bus is a derivative of the I2C bus which forms the physical layer of the Universal Serial Bus. Similary, the SMBus (System Management Bus) also uses I2C as its physical layer. A0h - Pentium Pro/II/III - Scratch EEPROM {#idx172424}

I2C(also IIC; the "2" is superscripted) Inter-Integrated Circuit Bus -- A moderate-speed serial communications bus originally invented by Philips in the early 1980s for consumer-electronics applications, such as inter-chip communication in a television set or high-end stereo. The I2C bus has recently appeared on PCs in video capture boards and similar devices, as well as (surprisingly) SDRAM DIMMs (for the on-board serial EEPROM). The ACCESS.bus is a derivative of the I2C bus which forms the physical layer of the Universal Serial Bus. Similary, the SMBus (System Management Bus) also uses I2C as its physical layer. A2h - Pentium Pro/II/III - Processor Information ROM(Read-Only Memory) A memory for program storage which may not be changed by the program as it runs. {#idx172429}{#idx172433}{#idx172441}{#idx172474}

INT 12 - CPU-generated (Pentium +) - MACHINE CHECK EXCEPTION {#idx7760}{#idx7768}{#idx7772}

INT 15 - AMIAmerican Megatrends, Inc.(American Megatrends, Inc.) A hardware, software and firmware company founded in 1985. PCI BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. - GET CPU(Central Processing Unit) The microprocessor which executes programs on your computer. TYPE AND SPEED {undocumentedInformation about a product which is not publicly available from the manufacturer, and must be determined by reverse-engineering (disassembly, trial-and-error, etc.). Undocumented information tends to change -- often dramatically -- between successive revisions of a product, since the manufacturer has no obligation to maintain compatibility in behavior which is not explicitly stated.} {#idx23733}{#idx23736}{#idx23742}{#idx23745}

INT 15 - Intel Pentium Pro BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE - BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE CONTROL {real mode} {#idx23213}

INT 15 - Intel Pentium Pro BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE - INSTALLATION CHECK {real mode} {#idx23143}{#idx23155}{#idx23162}

INT 15 - Intel Pentium Pro BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE - READ BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE AREA {real mode} {#idx23237}{#idx23248}{#idx23255}

INT 15 - Intel Pentium Pro BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE - WRITE BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE AREA {real mode} {#idx23168}{#idx23181}{#idx23192}

INT 15 - newer PS/2IBM PS/2, any model; various BIOSes - GET CPU(Central Processing Unit) The microprocessor which executes programs on your computer. TYPE AND MASK REVISION {#idx23016}{#idx23022}

INT 15 - SYSTEM - GET CONFIGURATION (XTIBM PC XT >1986/1/10,ATIBM PC AT mdl 3x9,CONVIBM Convertible,XT286IBM PC XT/286,PSIBM PS/2, any model) {#idx22375}{#idx22382}{#idx22389}

INT 1A - PCI BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. v2.0c+ - FIND PCI DEVICE {#idx32444}{#idx32458}{#idx32460}{#idx32462}{#idx32505}{#idx32512}{#idx32585}

INT 1A - PCI BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. v2.0c+ - READ CONFIGURATION DWORDDoubleword; four bytes. Commonly used to hold a 32-bit segment:offset or selector:offset address. (Intel devices) {#idx35479}{#idx36639}

INT 21 - DOS 2+ - "EXEC" - LOAD AND/OR EXECUTE PROGRAM {#idx50498}

MEM FEC0h:0000h - Pentium - 82379AB I/O APIC - I/O REGISTER SELECT {#idx164611}

MEM FEC0h:0010h - Pentium - 82379AB I/O APIC - I/O WINDOW {#idx164627}

MEM FEE0h:0000h - Pentium - LOCAL APIC {#idx164649}{#idx164654}{#idx164657}{#idx164666}

MEM FEE0h:0020h - Pentium - LOCAL APIC - LOCAL APIC ID REGISTER {#idx164679}

MEM FEE0h:0030h - Pentium - LOCAL APIC - LOCAL APIC VERSION REGISTER {#idx164685}

MEM FEE0h:0040h - Pentium - LOCAL APIC - RESERVED {#idx164690}

MEM FEE0h:0050h - Pentium - LOCAL APIC - RESERVED {#idx164696}

MEM FEE0h:0060h - Pentium - LOCAL APIC - RESERVED {#idx164702}

MEM FEE0h:0070h - Pentium - LOCAL APIC - RESERVED {#idx164708}

MEM FEE0h:0080h - Pentium - LOCAL APIC - TASK PRIORITY REGISTER (TPR) {#idx164714}

MEM FEE0h:0090h - Pentium - LOCAL APIC - ARBITRATION PRIORITY REGISTER (APR) {#idx164720}

MEM FEE0h:00A0h - Pentium - LOCAL APIC - END OF INTERRUPT REGISTER (EOI(End of Interrupt) A particular command sent to the interrupt controller to indicate that the interrupt has been handled by software and that new interrupts of the same or lower priority may now be signalled by the interrupt controller.) {#idx164726}{#idx164731}

MEM FEE0h:00B0h - Pentium - LOCAL APIC - RESERVED {#idx164737}

MEM FEE0h:00C0h - Pentium - LOCAL APIC - REMOTE READ REGISTER {#idx164743}

MEM FEE0h:00D0h - Pentium - LOCAL APIC - LOGICAL DURATION REGISTER (LDR) {#idx164749}

MEM FEE0h:00E0h - Pentium - LOCAL APIC - DESTINATION FORMAT REGISTER (DFR) {#idx164755}

MEM FEE0h:00F0h - Pentium + - LOCAL APIC - SPURIOUS INTERRUPT VECTOR REGISTER {#idx164761}

MEM FEE0h:0100h - Pentium + - LOCAL APIC - IN-SERVICE REGISTER (ISR) {#idx164776}

MEM FEE0h:0180h - Pentium + - LOCAL APIC - TRIGGER MODE REGISTER (TMR) {#idx164782}

MEM FEE0h:0200h - Pentium + - LOCAL APIC - INTERRUPT REQUEST REGISTER (IRR) {#idx164792}

MEM FEE0h:0280h - Pentium + - LOCAL APIC - ERROR STATUS REGISTER {#idx164801}{#idx164807}

MEM FEE0h:0300h - Pentium + - LOCAL APIC - INTERRUPT COMMAND REGISTER (ICR) {#idx164821}{#idx164828}{#idx164841}

MEM FEE0h:0310h - Pentium + - LOCAL APIC - INTERRUPT COMMAND REGISTER (ICR) {#idx164851}

MEM FEE0h:0320h - Pentium + - LOCAL APIC - LOCAL VECTOR TABLE ENTRY 0 (TIMER) {#idx164857}{#idx164864}

MEM FEE0h:0330h - Pentium + - LOCAL APIC - RESERVED {#idx164878}

MEM FEE0h:0340h - Pentium + - LOCAL APIC - RESERVED {#idx164884}

MEM FEE0h:0350h - Pentium + - LOCAL APIC - LOCAL VECTOR TABLE ENTRY 1 (LINT0) {#idx164891}{#idx164896}

MEM FEE0h:0360h - Pentium + - LOCAL APIC - LOCAL VECTOR TABLE ENTRY 2 (LINT1) {#idx164911}

MEM FEE0h:0370h - Pentium + - LOCAL APIC - LOCAL VECTOR TABLE ENTRY 3 (Error) {#idx164919}

MEM FEE0h:0380h - Pentium + - LOCAL APIC - INITIAL COUNT REGISTER (ICR) TIMER {#idx164926}

MEM FEE0h:0390h - Pentium + - LOCAL APIC - CURRENT COUNT REGISTER (CCR) TIMER {#idx164935}

MEM FEE0h:03A0h - Pentium - LOCAL APIC - RESERVED {#idx164943}

MEM FEE0h:03B0h - Pentium - LOCAL APIC - RESERVED {#idx164949}

MEM FEE0h:03C0h - Pentium - LOCAL APIC - RESERVED {#idx164955}

MEM FEE0h:03D0h - Pentium - LOCAL APIC - RESERVED {#idx164961}

MEM FEE0h:03E0h - Pentium + - LOCAL APIC - TIMER DIVIDE CONFIGURATION REGISTER {#idx164967}{#idx164972}

MEM xxxxh:xxx0h - Multiprocessor Specification - FLOATING POINTER STRUCTURE {#idx164563}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0000h - Pentium, Pentium Pro - MACHINE CHECK EXCEPTION ADDRESS {#idx164996}{#idx165007}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0001h - Pentium, Pentium Pro - MACHINE CHECK EXCEPTION TYPE {#idx165016}{#idx165023}{#idx165031}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0002h - Pentium - (TR1) PARITY REVERSAL TEST REGISTER {#idx165037}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0003h - Pentium - INVALID {#idx165060}{#idx165068}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0004h - Pentium - (TR2) INSTRUCTION CACHE END BITS {#idx165070}{#idx165073}{#idx165087}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0005h - Pentium - (TR3) CACHE DATA TEST REGISTER {#idx165089}{#idx165106}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0006h - Pentium - (TR4) CACHE TAG {#idx165124}{#idx165133}{#idx165134}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0007h - Pentium - (TR5) CACHE CONTROL {#idx165142}{#idx165150}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0008h - Pentium, PentiumMMX - (TR6) TLB COMMAND {#idx165169}{#idx165176}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0009h - Pentium, PentiumMMX - (TR7) TLB DATA {#idx165182}{#idx165187}{#idx165192}{#idx165194}{#idx165196}{#idx165198}{#idx165200}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:000Ah - Pentium A-step - (TR8) 36-BIT TLB DATA TEST REGISTER {obsolete} {#idx165202}{#idx165209}{#idx165211}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:000Bh - Pentium, PentiumMMX - (TR9) BRANCH TARGET BUFFER TAG {#idx165215}{#idx165221}{#idx165225}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:000Ch - Pentium, PentiumMMX - (TR10) BRANCH TARGET BUFFER TARGET {#idx165228}{#idx165234}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:000Dh - Pentium, PentiumMMX - (TR11) BRANCH TARGET BUFFER CONTROL {#idx165236}{#idx165243}{#idx165245}{#idx165250}{#idx165252}{#idx165254}{#idx165260}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:000Eh - Pentium, K6, C6 - (TR12) NEW FEATURE CONTROL {#idx165262}{#idx165268}{#idx165272}{#idx165277}{#idx165294}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:000Fh - Pentium - INVALID {#idx165306}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0010h - Pentium, Pentium Pro - TIME STAMP COUNTER REGISTER {#idx165309}{#idx165321}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0011h - Pentium, Cyrix 6x86MX - EVENT COUNTER SELECTION AND CONTROL {#idx165332}{#idx165337}{#idx165355}{#idx165357}{#idx165359}{#idx165370}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0012h - Pentium, Cyrix 6x86MX - EVENT COUNTER #0 {#idx165439}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0013h - Pentium, Cyrix 6x86MX - EVENT COUNTER #1 {#idx165445}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0014h - Pentium P54C - bug? {#idx165449}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0017h - Pentium Pro, PentiumII (0.25um) - ??? {#idx165454}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0018h - Pentium Pro, PentiumII - ??? {#idx165458}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:001Bh - Pentium Pro, PentiumII - APIC BASE ADDRESS {#idx165463}{#idx165467}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0021h - Pentium II - ??? {#idx165481}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:002Ah - Pentium Pro/II - "EBL_CR_POWERON" {#idx165483}{#idx165489}{#idx165515}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0032h - PentiumII - ??? {#idx165518}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0033h - Pentium Pro, PentiumII - "TEST_CTL" TEST CONTROL REGISTER {#idx165520}{#idx165528}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0034h - Pentium Pro - ??? {#idx165535}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:003Ah - Pentium Pro - ??? {#idx165537}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:003Bh - PentiumII - ??? {#idx165539}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0050h - Pentium Pro - ??? {#idx165541}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0051h - Pentium Pro - ??? {#idx165543}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0052h - Pentium Pro - ??? {#idx165545}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0053h - Pentium Pro - ??? {#idx165547}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0054h - Pentium Pro - ??? {#idx165549}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0079h - Pentium Pro, PentiumII - BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE TRIGGER {#idx165551}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0088h - Pentium Pro, PentiumII - "BBL_CR_D0" CHUNK 0 DATA REGISTER {#idx165650}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0089h - Pentium Pro, PentiumII - "BBL_CR_D1" CHUNK 1 DATA REGISTER {#idx165658}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:008Ah - Pentium Pro, PentiumII - "BBL_CR_D2" CHUNK 2 DATA REGISTER {#idx165666}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:008Bh - Pentium Pro - "BIOS_SIGN" BIOS(Basic Input/Output System) A set of standardized calls giving low-level access to the hardware. The BIOS is the lowest software layer above the actual hardware and serves to insulate programs (and operating systems) which use it from the details of accessing the hardware directly. UPDATE SIGNATURE {#idx165674}{#idx165685}{#idx165694}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:00AEh - Pentium Pro - ??? {#idx165703}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:00C1h - Pentium Pro - "PERFCTR0" PERFORMANCE COUNTER REGISTER 0 {#idx165705}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:00C2h - Pentium Pro - "PERFCTR1" PERFORMANCE COUNTER REGISTER 1 {#idx165711}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:00FEh - Pentium Pro - "MTRRcap" MEMORY TYPE RANGE REGISTER CAPABILITIES {#idx165717}{#idx165724}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0116h - PentiumII - "BBL_CR_ADDR" - SET L2 CACHE ADDRESS {#idx165819}{#idx165824}{#idx165826}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0118h - PentiumII - "BBL_CR_DECC" READ/WRITE L2 CACHE ECC BITS {#idx165837}{#idx165844}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0119h - PentiumII - "BBL_CR_CTL" - CACHE CONTROL REGISTER {#idx165846}{#idx165854}{#idx165860}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:011Ah - PentiumII - "BBL_CR_TRIG" TRIGGER CACHE CONFIGURATION CYCLE {#idx165871}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:011Bh - PentiumII - "BBL_CR_BUSY" CHECK IF CACHE CONFIG IN PROGRESS {#idx165880}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:011Eh - Pentium II - "BBL_CR_CTL3" L2 CACHE CONTROL REGISTER 3 {#idx165889}{#idx165903}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0131h - Pentium Pro - ??? {#idx165938}{#idx165940}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:014Eh - Pentium Pro - ??? {#idx165941}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:014Fh - Pentium Pro - ??? {#idx165943}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0150h - Pentium Pro - ??? {#idx165945}{#idx165947}{#idx165948}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0151h - Pentium Pro - ??? {#idx165949}{#idx165951}{#idx165952}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0154h - Pentium Pro - ??? {#idx165953}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:015Bh - Pentium Pro - ??? {#idx165955}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:015Fh - Pentium Pro - ??? {#idx165957}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0174h - Pentium II - "SYSENTER_CS" - SYSENTER target CS {#idx165959}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0175h - Pentium II - "SYSENTER_ESP" - SYSENTER target ESP {#idx165967}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0176h - Pentium II - "SYSENTER_EIP" - SYSENTER target EIP {#idx165974}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0179h - Pentium Pro - "MCG_CAP" MACHINE CHECK GLOBAL CAPABILITY {#idx165980}{#idx165989}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:017Ah - Pentium Pro/II - "MCG_STATUS" {#idx165993}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:017Bh - Pentium Pro - "MCG_CTL" {#idx165999}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0186h - Pentium Pro - "EVNTSEL0" - PERFORM. COUNTER EVENT SELECTION 0 {#idx166002}{#idx166008}{#idx166025}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0187h - Pentium Pro - "EVNTSEL1" - PERFORM. COUNTER EVENT SELECTION 1 {#idx166081}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01D3h - Pentium Pro - ??? {#idx166087}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01D9h - Pentium Pro, PentiumII - "DEBUGCTLMSR" DEBUGGING CONTROL {#idx166089}{#idx166100}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01DBh - Pentium Pro, PentiumII - "LASTBRANCHFROMIP" {#idx166109}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01DCh - Pentium Pro, PentiumII - "LASTBRANCHTOIP" {#idx166113}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01DDh - Pentium Pro, PentiumII - "LASTINTFROMIP" {#idx166117}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01DEh - Pentium Pro, PentiumII - "LASTINTTOIP" {#idx166123}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:01E0h - Pentium Pro - "ROB_CR_BKUPTMPDR6" {#idx166128}{#idx166131}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0200h - Pentium Pro - "MTRRphysBase0" {#idx166138}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0201h - Pentium Pro - "MTRRphysMask0" {#idx166141}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0202h - Pentium Pro - "MTRRphysBase1" {#idx166144}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0203h - Pentium Pro - "MTRRphysMask1" {#idx166147}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0204h - Pentium Pro - "MTRRphysBase2" {#idx166150}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0205h - Pentium Pro - "MTRRphysMask2" {#idx166153}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0206h - Pentium Pro - "MTRRphysBase3" {#idx166156}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0207h - Pentium Pro - "MTRRphysMask3" {#idx166159}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0208h - Pentium Pro - "MTRRphysBase4" {#idx166162}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0209h - Pentium Pro - "MTRRphysMask4" {#idx166165}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:020Ah - Pentium Pro - "MTRRphysBase5" {#idx166168}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:020Bh - Pentium Pro - "MTRRphysMask5" {#idx166171}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:020Ch - Pentium Pro - "MTRRphysBase6" {#idx166174}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:020Dh - Pentium Pro - "MTRRphysMask6" {#idx166177}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:020Eh - Pentium Pro - "MTRRphysBase7" {#idx166180}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:020Fh - Pentium Pro - "MTRRphysMask7" {#idx166183}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0250h - Pentium Pro - "MTRRfix64K_00000" {#idx166186}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0258h - Pentium Pro - "MTRRfix16K_80000" {#idx166190}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0259h - Pentium Pro - "MTRRfix16K_A0000" {#idx166194}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0268h - Pentium Pro - "MTRRfix4K_C0000" {#idx166198}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0269h - Pentium Pro - "MTRRfix4K_C8000" {#idx166202}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:026Ah - Pentium Pro - "MTRRfix4K_D0000" {#idx166206}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:026Bh - Pentium Pro - "MTRRfix4K_D8000" {#idx166210}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:026Ch - Pentium Pro - "MTRRfix4K_E0000" {#idx166214}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:026Dh - Pentium Pro - "MTRRfix4K_E8000" {#idx166218}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:026Eh - Pentium Pro - "MTRRfix4K_F0000" {#idx166222}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:026Fh - Pentium Pro - "MTRRfix4K_F8000" {#idx166226}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0277h - PentiumII - Page Attribute Table {#idx166232}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0280h - PentiumII - ??? {#idx166235}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:02FFh - Pentium Pro - "MTRRdefType" - DEFAULT MEMORY TYPE {#idx166237}{#idx166243}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0400h - Pentium Pro - "MC0_CTL" Machine Check Control 0 {#idx166251}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0401h - Pentium Pro - "MC0_STATUS" Machine Check Status 0 {#idx166257}{#idx166267}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0402h - Pentium Pro - "MC0_ADDR" Machine Check Address 0 {#idx166278}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0403h - Pentium Pro - "MC0_MISC" {#idx166283}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0404h - Pentium Pro - "MC1_CTL" Machine Check Control 1 {#idx166286}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0405h - Pentium Pro - "MC1_STATUS" Machine Check Status 1 {#idx166292}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0406h - Pentium Pro - "MC1_ADDR" Machine Check Address 1 {#idx166300}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0407h - Pentium Pro - "MC1_MISC" {#idx166305}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0408h - Pentium Pro - "MC2_CTL" Machine Check Control 2 {#idx166308}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0409h - Pentium Pro - "MC2_STATUS" Machine Check Status 2 {#idx166314}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:040Ah - Pentium Pro - "MC2_ADDR" Machine Check Address 2 {#idx166322}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:040Bh - Pentium Pro - "MC2_MISC" {#idx166327}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:040Ch - Pentium II - "MC4_CTL" Machine Check Control 4 {#idx166330}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:040Dh - Pentium II - "MC4_STATUS" Machine Check Status 4 {#idx166336}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:040Eh - Pentium II - "MC4_ADDR" Machine Check Address 4 {#idx166344}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0410h - Pentium Pro - "MC3_CTL" Machine Check Control 3 {#idx166349}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0411h - Pentium Pro - "MC3_STATUS" Machine Check Status 3 {#idx166355}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0412h - Pentium Pro - "MC3_ADDR" Machine Check Address 3 {#idx166363}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:0413h - Pentium Pro - "MC3_MISC" {#idx166368}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1000h - IBMInternational Busiuness MachinesInternational Busiuness Machines) A hardware, software and other service technology company founded in 1911. 386/486 SLC - PROCESSOR OPERATION REGISTER {#idx166397}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1001h - IBMInternational Busiuness MachinesInternational Busiuness Machines) A hardware, software and other service technology company founded in 1911. 386/486 SLC - CACHE REGION CONTROL REGISTER {#idx166413}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1002h - IBMInternational Busiuness MachinesInternational Busiuness Machines) A hardware, software and other service technology company founded in 1911. 386/486 SLC - PROCESSOR OPERATION REGISTER {#idx166422}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1003h - Pentium Pro - DEBUG REGISTER 3 {#idx166426}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1004h - IBMInternational Busiuness MachinesInternational Busiuness Machines) A hardware, software and other service technology company founded in 1911. 486BL3 - PROCESSOR CONTROL REGISTER {#idx166446}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1005h - Pentium Pro - DEBUG REGISTER 5 {#idx166450}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1006h - Pentium Pro - DEBUG REGISTER 6 {#idx166454}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:1007h - Pentium Pro - DEBUG REGISTER 7 {#idx166458}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:2000h - Pentium Pro/II - CONTROL REGISTER 0 {#idx166463}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:2002h - Pentium Pro/II - CONTROL REGISTER 2 {#idx166469}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:2003h - Pentium Pro/II - CONTROL REGISTER 3 {#idx166475}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 0000h:2004h - Pentium Pro/II - CONTROL REGISTER 4 {#idx166481}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0000h - Pentium - MACHINE CHECK EXCEPTION ADDRESS {#idx166488}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0001h - Pentium - MACHINE CHECK EXCEPTION TYPE {#idx166493}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0002h - Pentium - (TR1) PARITY REVERSAL TEST REGISTER {#idx166494}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0003h - Pentium - unimplemented {#idx166498}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0004h - Pentium - (TR2) INSTRUCTION CACHE END BITS {#idx166500}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0005h - Pentium - (TR3) CACHE DATA TEST REGISTER {#idx166505}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0006h - Pentium - (TR4) CACHE TAG {#idx166511}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0007h - Pentium - (TR5) CACHE CONTROL {#idx166515}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0008h - Pentium - (TR6) TLB COMMAND {#idx166520}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0009h - Pentium - (TR7) TLB DATA {#idx166525}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:000Ah - Pentium A-step - (TR8) 36-BIT TLB DATA TEST REGISTER {obsolete} {#idx166529}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:000Bh - Pentium - (TR9) BRANCH TARGET BUFFER TAG {#idx166534}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:000Ch - Pentium - (TR10) BRANCH TARGET BUFFER TARGET {#idx166538}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:000Dh - Pentium - (TR11) BRANCH TARGET BUFFER CONTROL {#idx166542}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:000Eh - Pentium - (TR12) NEW FEATURE CONTROL {#idx166546}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:000Fh - Pentium - ??? {#idx166550}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0010h - Pentium - TIME STAMP COUNTER {#idx166552}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0011h - Pentium - EVENT COUNTER SELECTION AND CONTROL {#idx166558}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0012h - Pentium - EVENT COUNTER #0 {#idx166562}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0013h - Pentium - EVENT COUNTER #1 {#idx166566}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0014h - Pentium - ??? {#idx166569}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0015h - Pentium - unimplemented??? {#idx166570}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0016h - Pentium - unimplemented??? {#idx166572}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0017h - Pentium - unimplemented??? {#idx166574}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0018h - Pentium - ??? (PAGING-RELATED) {#idx166576}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:0019h - Pentium - FLOATING POINT - LAST PREFETCHED OPCODE {#idx166580}{#idx166581}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:001Ah - Pentium - FLOATING POINT - LAST NON-CONTROL OPCODE {#idx166587}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:001Bh - Pentium - FLOATING POINT - LAST EXCEPTION OPCODE {#idx166591}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:001Ch - Pentium - ??? {#idx166594}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:001Dh - Pentium - PROBE MODE CONTROL REGISTER {#idx166597}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:001Eh - Pentium - ??? {#idx166613}

MSR(Model-Specific Register) Additional, indirectly-accessible, registers containing control or status information about various aspects of the processor such as caches, performance counters, and the like. These registers, accessible via the RDMSR and WRMSR instructions, were added with the Pentium and later-model 486 processors. 8000h:001Fh - Pentium - ??? {#idx166616}

Notes {#idx164988}

Opcodes List {#idx172680}{#idx172688}{#idx172696}{#idx172700}{#idx172702}{#idx172704}{#idx172706}{#idx172718}{#idx172857}{#idx172890}{#idx172892}{#idx172897}{#idx172901}{#idx172907}{#idx172912}{#idx172913}{#idx172917}{#idx172924}{#idx172928}{#idx172939}{#idx172948}{#idx172960}{#idx172968}{#idx173022}{#idx173023}{#idx173030}{#idx173050}{#idx173059}{#idx173062}{#idx173069}{#idx173072}{#idx173079}{#idx173087}{#idx173088}{#idx173096}{#idx173108}{#idx173121}{#idx173122}{#idx173124}{#idx173127}{#idx173130}{#idx173133}{#idx173136}{#idx173139}{#idx173143}{#idx173145}{#idx173148}{#idx173149}{#idx173239}{#idx173247}{#idx173249}{#idx173251}{#idx173253}{#idx173255}{#idx173257}{#idx173259}{#idx173261}{#idx173263}{#idx173283}{#idx173288}{#idx173295}{#idx173331}{#idx173340}{#idx173346}{#idx173373}{#idx173377}{#idx173383}{#idx173386}{#idx173389}{#idx173391}{#idx173393}{#idx173399}{#idx173400}{#idx173411}{#idx173413}{#idx173415}{#idx173417}{#idx173419}{#idx173421}{#idx173424}{#idx173430}{#idx173431}{#idx173451}{#idx173453}{#idx173455}{#idx173457}{#idx173478}{#idx173480}{#idx173484}{#idx173485}{#idx173496}{#idx173497}{#idx173507}{#idx173508}{#idx173518}{#idx173519}{#idx173532}{#idx173533}{#idx173547}{#idx173548}{#idx173573}{#idx173574}{#idx173587}{#idx173588}{#idx173600}{#idx173601}{#idx173611}{#idx173612}{#idx173623}{#idx173624}{#idx173634}{#idx173635}{#idx173656}{#idx173662}{#idx173668}{#idx173669}{#idx173683}{#idx173684}{#idx173698}{#idx173699}{#idx173713}{#idx173714}{#idx173728}{#idx173729}{#idx173743}{#idx173744}{#idx173767}{#idx173805}{#idx173821}{#idx173822}{#idx173845}{#idx173850}{#idx173855}{#idx173860}{#idx173864}{#idx173891}{#idx173896}{#idx173897}{#idx173907}{#idx173908}{#idx173922}{#idx173923}{#idx173933}{#idx173947}{#idx173954}{#idx173962}{#idx173963}{#idx173975}{#idx173976}{#idx173987}{#idx173988}{#idx174001}{#idx174002}{#idx174018}{#idx174019}{#idx174035}{#idx174036}{#idx174053}{#idx174054}{#idx174069}{#idx174070}{#idx174085}{#idx174086}{#idx174100}{#idx174101}{#idx174117}{#idx174118}{#idx174138}{#idx174139}{#idx174155}{#idx174156}{#idx174171}{#idx174172}{#idx174185}{#idx174186}{#idx174205}{#idx174206}{#idx174219}{#idx174220}{#idx174231}{#idx174232}{#idx174244}{#idx174245}{#idx174259}{#idx174260}{#idx174272}{#idx174273}{#idx174284}{#idx174285}{#idx174295}{#idx174297}{#idx174299}{#idx174304}{#idx174305}{#idx174331}{#idx174341}{#idx174441}{#idx174467}{#idx174484}{#idx174486}{#idx174501}{#idx174503}{#idx174507}{#idx174530}{#idx174532}{#idx174536}{#idx174543}{#idx174545}{#idx174563}{#idx174583}{#idx174623}{#idx174625}{#idx174627}{#idx174643}{#idx174646}{#idx174660}{#idx174668}{#idx174692}{#idx174694}{#idx174698}{#idx174704}{#idx174709}{#idx174719}{#idx175092}{#idx175200}{#idx175201}{#idx175202}{#idx175204}{#idx175205}{#idx175206}{#idx175207}{#idx175208}{#idx175209}{#idx175210}{#idx175213}{#idx175217}{#idx175223}{#idx175227}{#idx175228}{#idx175229}{#idx175230}{#idx175231}{#idx175232}{#idx175233}{#idx175235}{#idx175249}{#idx175255}{#idx175287}{#idx175429}{#idx175436}{#idx175447}{#idx175458}{#idx175460}{#idx175463}{#idx175466}{#idx175467}{#idx175468}{#idx175471}{#idx175477}{#idx175482}{#idx175496}{#idx175504}{#idx175521}{#idx175531}{#idx175552}{#idx175562}{#idx175570}{#idx175580}{#idx175581}{#idx175582}{#idx175584}{#idx175588}{#idx175590}{#idx175592}{#idx175594}{#idx175597}{#idx175603}{#idx175607}{#idx175610}{#idx175615}{#idx175616}{#idx175620}{#idx175632}{#idx175644}{#idx175729}{#idx175746}{#idx175747}{#idx175749}{#idx175751}{#idx175753}{#idx175767}{#idx175768}{#idx175770}{#idx175772}{#idx175774}{#idx175779}{#idx175780}{#idx175782}{#idx175784}{#idx175790}{#idx175792}{#idx175794}{#idx175798}{#idx175799}{#idx175812}{#idx175813}{#idx175814}{#idx175815}{#idx175816}{#idx175817}{#idx175818}{#idx175819}{#idx175820}{#idx175821}{#idx175822}{#idx175824}{#idx175828}{#idx175834}{#idx175837}{#idx175844}{#idx175860}{#idx175871}{#idx175874}{#idx175937}{#idx175940}{#idx175998}{#idx176065}{#idx176071}

PORTIBM PC Portable (uses same BIOS as XT) 0022-0023 - CHIP SET DATA {#idx133587}

PORTIBM PC Portable (uses same BIOS as XT) 00EB - Intel "Triton" chipset - ??? {#idx142317}

PORTIBM PC Portable (uses same BIOS as XT) 00ED - DUMMY PORTIBM PC Portable (uses same BIOS as XT) FOR DELAY??? {#idx142341}

PORTIBM PC Portable (uses same BIOS as XT) C100-C1FF - Intel Pentium mboard - PCTech RZ1000 EIDE controller {#idx157653}

PORTIBM PC Portable (uses same BIOS as XT) C200-C204 - Intel Pentium mboard ("Neptune" chipset) {#idx157675}

PORTIBM PC Portable (uses same BIOS as XT) C244 - Intel Pentium mboard ("Neptune" chipset) {#idx157704}

Ralf Brown Programs {#idx177182}

System-management mode {#idx166836}